What is Drain Source Leakage Current of a GaN Transistor?

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Editorial Team - everything PE

Aug 9, 2023

The drain-source leakage current (IDSS) of a GaN transistor is the current that flows from the drain to the source terminal when the gate-to-source voltage (VGS) is zero or when the device is in an off state. IDSS is typically measured under specified conditions, including a specific gate-to-source voltage (VGS) and drain-to-source voltage (VDS). The IDSS rating is crucial as it determines the maximum leakage current when the FET is in an off-state. If the IDSS is too high, it can lead to power loss and decreased efficiency in power electronic applications.

Factors causing drain-source leakage current

  • Trap-Assisted Tunneling: GaN materials, especially those grown on foreign substrates like silicon, can have defects and traps in the crystal lattice. These traps can lead to trap-assisted tunneling, allowing carriers to tunnel through the barrier between the drain and source terminals even with a zero or negative gate bias.
  • Surface States: The presence of surface states at the interface between the gate insulator and GaN semiconductor can lead to increased leakage current. These surface states can trap charge carriers, leading to increased off-state leakage.
  • Gate Oxide Traps: GaN FETs typically have a thin gate oxide layer, and defects or traps in this oxide can facilitate the leakage of carriers, contributing to IDSS.
  • Avalanche Breakdown: In high voltage applications, the drain electric field can exceed the critical field strength, leading to avalanche breakdown and increased leakage current.
  • Temperature: Temperature also plays a significant role in IDSS. As temperature increases, carriers in the semiconductor material gain more energy, leading to higher leakage current levels.

Effects of high drain-source leakage current

  • Power Loss: The leakage current, even when the device is in the off-state, results in power dissipation, reducing the overall efficiency of the circuit.
  • Thermal Management Challenges: Increased power dissipation due to high IDSS can lead to elevated operating temperatures, necessitating more robust and efficient cooling solutions.
  • Reliability Concerns: High leakage currents can accelerate device degradation and reduce the operational lifespan of the GaN FET.
  • Signal Integrity Issues: In RF applications, excessive IDSS can affect signal integrity, leading to reduced sensitivity and performance.

Methods to reduce drain-source leakage current

  • Material Optimization: Improving the quality of the GaN material itself can reduce defects and traps, thus minimizing trap-assisted tunneling and leakage current.
  • Gate Oxide Engineering: Modifying the gate oxide structure or using advanced dielectric materials can reduce oxide traps and improve the overall gate insulation performance.
  • Surface Passivation: Employing passivation techniques can reduce the impact of surface states and improve device characteristics.
  • Improved Fabrication Processes: Optimizing device fabrication processes can help in reducing crystal defects and improving overall device performance.
  • Thermal Design: Efficient thermal management techniques are essential to control the operating temperature and minimize leakage due to increased temperature.

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