Power integrity (PI) is a hot topic for high-speed digital designers. The stack-up in the PCB, component layout and, decoupling/bypass network design are critical to avoid PI problems. However, the design of the power distribution network (PDN) is not only important from a signal integrity point of view. The EMI/EMC behavior of the product can be seriously affected if you have PI problems.This webinar will present the fundamentals for this problem and ways for minimising risks.